The present invention is related generally to the field of electronic semiconductor devices, and more particularly, to voltage converter circuitry included therein for generating a relatively stable output voltage.
Many semiconductor devices are designed to operate at various supply voltages and signal voltages. To accommodate the use of different supply voltages, the semiconductor device is typically designed to operate at the lower supply voltage. The lower supply voltage is often generated by including a voltage converter that steps-down the voltage of a higher external voltage level to a lower internal voltage level that is provided by an internal power supply. Thus, the device will be able to function whether the voltage of the external supply is greater than or equal to the voltage of the internal voltage supply. However, an issue that exists for any internal power supply of a device, both for devices that can operate at multiple supply voltage levels as well those that cannot, is whether the internal power supply has sufficient current drive capabilities.
A common occurrence that challenges the drive capabilities of an internal supply occurs when a device becomes active from a stand-by mode. Many devices are designed to automatically enter into a stand-by mode where power consumption is reduced to a minimum when the device is not currently in use. However, when the device becomes active again, the current loading often increases suddenly, placing a severe current load on the internal power supply. In some instances, the current loading of the internal power supply is so sudden that it causes the voltage of the internal power supply to drop-off. In severe cases, the voltage drop-off may be great enough to cause the device to malfunction.
Many different approaches have been taken in response to the current loading issue. One such approach is to simply design an internal power supply having greater current drive capabilities. However, although this is simple in principle, the implementation of such often poses several challenges. Another issue is the amount of space required to include an internal power supply having greater current drive capabilities. Where miniaturization is a priority in the design of the device, including an internal power supply having adequate current drive capabilities, but takes up more space, may not be an acceptable alternative. Another approach taken has been to accept increased power consumption in a stand-by state to reduce the current load when the device returns to an active mode. However, this alternative is undesirable because, as previously mentioned, it is generally desirable to design devices that are power efficient. Therefore, there is a need for a voltage converter that can provide a relatively stable output voltage in spite of sudden increases in current loading on the output.
The present invention is directed to an apparatus and method for compensating for a decreasing internal voltage that is generated from a higher external voltage. In response to the internal voltage decreasing in excess of a voltage margin, the amount by which the higher external voltage is reduced in generating the internal voltage is adjusted. The internal voltage is generated by a voltage conversion circuit having an input node to which the higher external voltage is applied, an output node at which the lower internal voltage is provided, and a control node to which a control signal having a control voltage is applied. The voltage conversion circuit generates an internal voltage having a voltage relative to the higher external voltage based on the voltage of the control signal. A compensation circuit is coupled to the voltage conversion circuit and includes a sense node coupled to the output node of the voltage conversion circuit, a supply node coupled to the input node of the voltage conversion circuit, and a feedback node coupled to the control node of the voltage conversion circuit. The compensation circuit generates a feedback signal at the feedback node to compensate for a decrease in the output voltage in response to the voltage of the output voltage falling below the voltage margin.